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Directly following 7nm horizontal grid core and launching 12LP+process: performance improvement of 20%
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Directly following 7nm horizontal grid core and launching 12LP+process: performance improvement of 20%

Views: 0     Author: Site Editor     Publish Time: 2023-10-09      Origin: Site

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Directly following 7nm horizontal grid core and launching 12LP+process: performance improvement of 20%

At today's Global Technology Conference GTC, Globalfoundries (GF) announced the launch of the 12LP process, an improved version of the 12nm LP process, with a 20% performance improvement and a 40% reduction in power consumption


GF Company, which was separated from AMD, suddenly announced in August last year that it would abandon 7nm and below processes and focus on 14/12nm and special processes. As a result, AMD had to completely transfer the 7nm order to TSMC. On the GF side, the 14/12nm process will still be outsourced to AMD, and the IO cores of the current 7nm Ruilong and Xiaolong processors are still outsourced by GF.


Although GF is no longer pursuing more cutting-edge processes, it will not stop technological upgrades. The 12LP process launched this time is improved and optimized based on the 12nm LP (which is also improved on the 14nm process). Compared with the latter, it has improved performance by 20%, reduced power consumption by 40%, and reduced product size by 15%


A major feature of this process is high-speed, with SARM unit voltage as low as 0.5V, supporting high-speed and low-power data transmission between processors and memory, which is an important requirement in computing and AI applications.


Directly following 7nm horizontal grid core and launching 12LP+process: performance improvement of 20% At the same time, GF has also launched a design reference kit suitable for AI applications and program/technology joint development (DTCO) services, both of which can improve the overall design of AI circuits and achieve low-power and low-cost development.


Another key feature is 2.5D packaging, which helps integrate high bandwidth memory HBMs with processors for high-speed, low-power data transmission.


GF indicates that the 12LP process can fully utilize ARM's physical IP and POP IP cores in AI applications, and these two IP schemes are also applicable to the original 12nm process.


For the 12LP process, GF officially stated that their 12LP solution can provide customers with the performance and power advantages they hope to obtain from the 7nm process, but the NRE cost is only half of the 7nm process, which can save a lot. In addition, the 12nm process is already mature enough, and the customer's lamination speed will also be fast, which helps to quickly meet the growing AI market demand.


According to GF, the PDK of the 12LP process is now available and is collaborating with multiple customers. It is expected to be taped in the second half of 2020 and mass produced at the Fab 8 factory in New York starting in 2021.


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